Market|wireless

Wireless Communications

Xilinx offers high-performance, cost-effective solutions for wireless networking equipment, in areas such as RF digital front end (DFE) signal processing, baseband processing (including forward error correction (FEC), Fourier transforms and adaptive modulation),  and advanced interfacing, connectivity and bridging solutions. Xilinx and our partners offer:

  • Reference designs and hardware platforms to simplify the development of high-performance radio and baseband processing functions.
  • Flexible and upgradeable solutions that meet the challenges of evolving standards, such as WCDMA, WiMAX, TD-SCDMA and LTE.
  • IP and reference designs to support the latest radio, baseband and DSP connectivity standards, such as CPRI, OBSAI and SRIO.
  • Industry leading FEC solutions, such as advanced Turbo Codec algorithms, which improve throughput, reduce latency and lower cost-per-channel.
  • A comprehensive portfolio of networking solutions to support the development of new, low-latency, base station architectures and the transition towards an All-IP core and backhaul network..

Our available resources, organized by function and type, include:

Leverage the capabilities of our newest Virtex®-5 FPGA for your demanding wireless solutions.

Wireless communications resources are also available for:

Interfaces and Connectivity
Topic Resource Type Provider
OBSAI RP3 OBSAI RP3/RP3-01 v4.0 IP Core
Device architecture: Virtex-5 LXT/SXT
IP Xilinx, Inc.
CPRI CPRI v2.1 IP Core
Device architecture: Virtex-5 LXT/SXT
IP Xilinx, Inc.
CPRI Multi-hop CPRI Multi-hop Remote Radio Head Reference Design IP Xilinx, Inc.
SRIO SRIO Custom search Xilinx, Inc.
PCI Express® Development Kit for PCI Express Development kit Xilinx, Inc.
Ethernet MAC Ethernet MAC built-in hard IP for Virtex-5 LXT/SXT FPGA Silicon feature Xilinx, Inc.
EMIF XAPP753 - FPGA Interface to the TMSC6000 DSP Platform Using EMIF (PDF) App note Xilinx, Inc.
VLYNQ DS324 - VLYNQ v1.2 (PDF) Data sheet Xilinx, Inc.
VLYNQ Interface for Texas Instruments Processors IP Xilinx, Inc.
LinkPort XAPP634 - Analog Devices TigerSHARC Link (PDF) App note Xilinx, Inc.
XAPP635 - Interfacing Virtex-II Series FPGAs With Analog Devices TigerSHARC TS20x DSPs via LVDS Link Ports (PDF) App note Xilinx, Inc.
High Speed ADC/DAC Interface ADC/DAC application notes Custom search Xilinx, Inc.
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RF (Radio Card)
Topic Resource Type Provider
LTE LTE Digital Front End Reference Design (login required)
Supports latest 3GPP-LTE standard
Optimized design with small footprint
Device architecture: Virtex-5 FPGA
Channel Bandwidths – 5, 10, 15, 20MHz
ACLR ≥ 60 dB

CFR: 1 carrier (EVM≤2% at 8dB PAPR)
Reference design Xilinx, Inc.
Digital Pre-Distortion (DPD) Digital Pre-Distortion
Advanced high-performance Digital Pre-Distortion solutions have been developed and are available to selected customers.
Device architecture: Virtex-4 SX, Virtex-5 SXT
Multiple PA types: Doherty, Class AB, LDMOS, GaN
Multiple standards: LTE, WCDMA, WiMAX, TD-SCDMA, GSM
Spectral correction range: 15db – 33dB
IP Core Xilinx, Inc.
Peak Cancellation Crest Factor Reduction (PC-CFR) PC-CFR Reference Design (login required)
Device architecture: Virtex-4, Virtex-5 FPGA
Supports multiple sample rates & air interface standards
Extremely low power
Optimized design with small footprint
System Generator example provided: TD-SCDMA
Reference design Xilinx, Inc.
WCDMA/HSPA WCDMA/HSPA Reference Design (login required)
Device architecture: Virtex-4, Virtex-5 FPGA
DUC: 3 carrier
DDC: 6 carrier (receiver diversity)
CFR: 3 carrier (PAPR<6 dB@<11% EVM, >60 dB ACLR)
Reference design Xilinx, Inc.
WiMAX WiMAX Reference Design (login required)
Device architecture: Virtex-4, Virtex-5 FPGA
DUC: 1 carrier (dynamic switching 3.5, 5, 7 and 10 MHz)
DDC: 1 carrier (dynamic switching 3.5, 5, 7 and 10 MHz)
CFR: 1 carrier (PAPR>1.5 dB@2% EVM)
Reference design Xilinx, Inc.
WiMAX Reference Design (login required)
Device architecture: Spartan®-3A DSP FPGA
DUC: 1 carrier (dynamic switching 5 and 10 MHz)
DDC: 1 carrier (dynamic switching 5 and 10 MHz)
Reference design Xilinx, Inc.
TD-SCDMA TD-SCDMA Reference Design (login required)
Device architecture: Virtex-4 FPGA
DUC: up to 6 carrier
DDC: up to 6 carrier
Reference design Xilinx, Inc.
DUC/DDC Modulation and demodulation IP
Device architecture: various
Custom search Xilinx, Inc. and partners
XAPP1018 - Designing Efficient DUC/DDC with System Generator and Core Generator (PDF) App note Xilinx, Inc.
XAPP1113 - Designing Efficient Digital Up and Down
Converters for Narrowband Systems
(inc. Multi-Carrier GSM example)
(PDF) Device Architecture: Virtex-5 DUC and DDC for 4-carrier GSM
App note Xilinx, Inc.
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Baseband Processing (Channel Card)
Topic Resource Type Provider
LTE Downlink Reference Design
Receiver Reference Design
Baseband System Reference Design
LTE MIMO Encoder LogiCORE
LTE Channel Encoder LogiCORE
LTE Channel Decoder LogiCORE
LTE Turbo Encoder LogiCORE
LTE Turbo Decoder LogiCORE
Reference design
Reference design
Reference design
IP
IP
IP
IP
IP
Xilinx, Inc.
Xilinx, Inc.
Xilinx, Inc.
Xilinx, Inc.
Xilinx, Inc.
Xilinx, Inc.
Xilinx, Inc.
Xilinx, Inc.
WCDMA/HSPA Downlink Chip Rate LogiCORE IP Xilinx, Inc.
RACH LogiCORE IP Xilinx, Inc.
Searcher LogiCORE IP Xilinx, Inc.
WiMAX FEC WiMAX IEEE802.16-2004 FEC Reference Design (login required)
System Generator 8.1 and later
Tx and Rx chains including Randomiser/Derandomizer, RS/Viterbi FEC encode/decode, Interleaver/Deinterleaver, QAM Mapper/Demapper
Reference design Xilinx, Inc.
FEC Cores Turbo Codecs IP Custom search Xilinx, Inc.
Reed-Solomon IP Custom search Xilinx, Inc.
Viterbi/Convolutional IP Custom search Xilinx, Inc.
LDPC IP Custom search Xilinx, Inc.
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