Please refer to the Offerings and System Requirements for details on system requirements for Endpoint Block Plus for PCIe.

Install the required updates from the Software Updates page if you have not already done so.

You must be registered on Xilinx.com to access this service pack.

• Make sure you have satisfied the requirements listed at the top of this page.
• Follow the Installation Instructions in the LogiCORE IP Endpoint Block Plus for PCI Express Release Notes Answer Record to install the archive onto your Xilinx 10.1 software installation.
• Download 10.1i IP Update 3 from the Software Updates page
  • You must be registered on Xilinx.com to perform this download
  • If you have not registered, you will be given the opportunity to do so when you download the updates.
• Follow the Installation Instructions in the Getting Started Guide for this product.
• Start up the CORE Generator using the following path:
  • From Windows: Select Programs -> Xilinx ISE 10.1i -> Accessories -> CORE Generator
• To access the core:
  • Double-click on the Standard Bus Interface folder in the left panel of the CORE Generator GUI, then double-click on the PCI Express folder and click on PCIe Endpoint Block. The Block Plus for PCIe Core summary panel will appear in the right panel of the CORE Generator GUI.
  • Double-click on the PCIe Block Plus entry in the left catalog panel, or single-click on the Customize link in the right panel to call up the Block Plus IP customization GUI.
  • Select the desired options for the core, then click on Finish.
• The following support files will be generated in your CORE Generator project directory:
  • .NGC implementation netlist
  • .veo or .vho file (Verilog or VHDL instantiation templates)
  • .XCO log file
• The following support files are written to a subdirectory named <component_name> located within the project directory.
  • Release Note: readme_pcie_blk_plus.txt
  • Supporting documentation (Data Sheet, User Guide, Getting Started Guide)
  • Subdirectories containing example wrapper files
  • Simulation support files

Since the Xilinx LogiCORE IP Endpoint Block Plus for PCI Express is standalone and provided free of charge to all licensed Xilinx ISE customers, there is no "Full System Hardware Evaluation" version of this core.