| Summary |
| Access to the Xilinx Packet Queue LogiCORE™ IP Core is delivered by default in Simulation Only mode to allow you to evaluate the core in your system level simulation. |
| Requirements |
- Xilinx ISE® 9.2i SP2 or higher must be installed
- Download this Service Pack from the Software Updates page if you have not already done so.
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| License Terms |
| Please note that the conditions of the Evaluation License Agreement apply toward your evaluation of this core. |
| Accessing Evaluation Files |
| Simulation-only Evaluation |
Simulation Only Evaluation allows you to customize the core through a CORE Generator™ customization GUI and generate a Simprim gate level model for functional simulation. To perform a Simulation Only Evaluation:
- Make sure you have satisfied the requirements listed at the top of this page.
- Follow the installation instructions in the 9.2i IP Update 1 Release Notes to install the archive onto your Xilinx ISE 9.2i software installation.
- Start up the CORE Generator using either of the following two methods:
- From ISE: Select Projects -> New Source -> IP (Coregen and Architecture Wizard)
- From Windows: Select Programs -> Xilinx ISE 9.2i -> Accessories -> CORE Generator
- To access the core, double click on the "Communication & Networking" folder in the left hand panel of the CORE Generator GUI, then double click on the "Telecommunications" folder.
- Double click on the Packet Queue core to call up the IP customization GUI.
- Select the desired options for the core, then click on the Generate button.
- The following support files will be generated in your CORE Generator project directory:
- .edn, .ngc, .veo, .vho, .xco, .xcp
- <core_name>_flist.txt
- a subdirectory named <user_core_name>
- a <user_core_name>_release_notes.txt file in the <user_core_name> directory
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| Full System Hardware Evaluation |
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Since the Xilinx Packet Queue LogiCORE IP is provided free of charge to all licensed Xilinx ISE customers, there is no "Full System Hardware Evaluation" version of this core.
Please register to download the full release core.
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| Known Issues |
| For Packet Queue release notes and known issues, see Answer Record # 25222. |
| Learn More |
| You can learn more about the Xilinx Packet Queue LogiCORE IP by visiting the Packet Queue LogiCORE product page. |
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