System Generator for DSP
The
leading-edge modeling and implementation tool for high-performance DSP systems.
This tool is the industry’s leading high-level tool for designing high-performance DSP systems using FPGAs.
- Develop highly parallel systems with the industry’s most advanced FPGAs
- Provide system modeling and automatic code generation from Simulink® and MATLAB® (The MathWorks, Inc.)
- Integrates the RTL, embedded, IP, MATLAB and hardware components of a DSP system
- A key component of the Xilinx XtremeDSP™ Tools Package and the XtremeDSP Development and Starter Kits
Developers with little FPGA design experience can quickly create production quality FPGA implementations of DSP algorithms in a fraction of traditional RTL development times.
Device Family Support
- Virtex®-5 LX, LXT, SXT, FXT
- Virtex-4 FX, LX, SX
- Virtex-II Pro
- Virtex-II
- Virtex-E
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- Spartan®-3A DSP
- Spartan-3A, AN
- Spartan-3, 3E
- Spartan-II, IIE
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System Requirements
- Microsoft Windows XP Professional (32-bit)
Key Features
- DSP modeling(1). Build and debug high-performance DSP systems in Simulink using the Xilinx Blockset that contains functions for signal processing (e.g., FIR filters, FFTs), error correction (e.g., Viterbi decoder, Reed-Solomon encoder/decoder), arithmetic, memories (e.g., FIFO, RAM, ROM), and digital logic. The Xilinx Blockset also provides blocks for importing MATLAB functions (e.g., to create control circuits) and HDL modules (System Generator provides HDL co-simulation interfaces to ModelSim from Mentor Graphics and the Xilinx ISE Simulator).
- Automatic code generation of VHDL or Verilog from Simulink. Implement behavioral (RTL) generation and target specific Xilinx IP cores from the Xilinx Blockset. There is also a limited (but useful) ability to generate RTL for functions written in MATLAB. Deliver “black box” HDL modules as part of a larger design.
- Hardware co-simulation. Create an “FPGA-in-the-loop” simulation target: a code generation option that allows you to validate working hardware and accelerate simulations in Simulink and MATLAB. System Generator supports Ethernet (10/100/Gigabit), PCI™, Cardbus, and JTAG communication between a hardware platform and Simulink.
- Hardware / software co-design of embedded systems. Build and debug DSP co-processors for the Xilinx MicroBlaze™ 32-bit RISC processor. System Generator provides a shared memory abstraction of the HW/SW interface, automatically generating the DSP co-processor, the bus interface logic, software drivers, and software documentation for using the co-processor.
Note:
- Please refer to the System Generator Users Guides (PDF) for a complete list of Xilinx optimized DSP blocks available for use within the Simulink modeling environment.
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