Product Details
Documentation
Device Family Support
- Spartan-3
- Virtex-4 LX
- Virtex-4 SX
- Virtex-5 LX
Requirements
The Xilinx LogiCORE™ H.264 Deblocking Filter ("H.264 Deblocker") core is a fully functional design block for Xilinx FPGAs. The Deblocker accepts input parameters and macroblocks to deblock and generates output macroblocks. The format of the macroblocks conforms to specifications defined by the ITU-T Video Coding Experts Group (VCEG) together with the ISO/IEC Moving Picture Experts Group (MPEG). These specifications are the product of a collective partnership effort known as the Joint Video Team (JVT).
Key Features
- Designed to H.264/MPEG-4 Part 10 Main/High/High Ext. standard
- Support for up to 300,000 Macroblocks/s operation (up to 1080P/30)
- Boundary Strength calculation internal to core
- Pass through Mode
- FIFO reset facility for loss-of sync robustness
- YUV 4:2:0 format support
