Overview

The Only Low Power 3.3 Volt Solution in the Industry

Designers need CPLD devices that offer low power, high speed, high density, and the flexibility to make changes to their design at any stage of the design process. CoolRunner XPLA3 is the only 3.3 volt CPLD family that can offer this combination.

  • 24.5µA typical standby current
  • Up to 213MHz performance
  • Ultra-small chip scale packaging
  • Robust architecture delivers great ISP
  • Free WebPACK software

CoolRunner XPLA3 Devices Out Performs the Competition

CPLD Comparison

• Lattice's ispMACH 4000V & Altera's MAX II have 1.8 volt cores & use power draining internal voltage regulators for 3.3 volt operation.

• Both competitive devices have typical standby current that is over 675 times higher than CoolRunner XPLA3!

• Note: Typical standby current comparisons are at 3.3V & 25ºC

Industry's First and Most Efficient PLD Architecture

The CoolRunner XPLA3 advanced architecture features a direct input register path, multiple clocks, JTAG programming, 5 volt tolerant I/Os and a full PLA structure. These enhancements deliver high speed coupled with the best flexible logic allocation which results in the ability to make design changes without changing pin-outs. The CoolRunner XPLA3 architecture includes a pool of 48 product terms that can be allocated to any macrocell in the logic block.

XPLA3 Architecture

This combination allows logic to be allocated efficiently throughout the logic block and support as many product terms as needed per macrocell. In addition, there is no speed penalty for using a variable number of product terms per macrocell.

CoolRunner XPLA3 At-A-Glance

Take a look at the wide range of features and benefits offered though the Xilinx CoolRunner XPLA3 3.3V family of CPLDs.

Features Benefits

FZP design technology

Lowest stand-by and total current consumption of any CPLD

32 to 512 macrocell offerings

Full range of densities

Fast pin-to-pin timing, 32 macrocell - 5ns

Perfect fit for high-speed systems
3.3 V operation with 5V tolerant I/Os Simplifies multivoltage system design

Full 36 by 48 PLA - Fully programmable AND/ programmable OR structure

Optimizes sharing and resource utilization (all product terms available)

Bus friendly I/O

Pull-up resistor for I/O termination

Multiple clocking options

Maximum clocking resources for design flexibility

Fast input registers

Supports direct high-speed interface

3.3V in-system programmable (ISP) using JTAG IEEE 1149.1 interface

Easier board production and field upgrades

Small, surface mount packages (0.8mm and 0.5mm ball pitch BGAs)

Smallest footprint for maximum board space savings

Advanced 5-layer metal process technology

Lowest cost

Extended supply voltage industrial devices (2.7V -3.6V)

2.7V extends system battery life

 
Jobs Events Webcasts News Investors Feedback Legal Privacy Trademarks Sitemap
© 1994-2008 Xilinx, Inc. All Rights Reserved.