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Spartan-3E FPGA
Logic-Optimized Platform
The Spartan®-3E platform meets the needs of high volume, cost-sensitive consumer electronic applications such as broadband access, home networking, display/projection, and digital television equipment for gate or logic centric designs.
What’s in Spartan-3E FPGA?
- Supports commodity serial (SPI) and parallel (BPI) flash memory and Platform Flash
- Multiboot capabilities with parallel flash
- Pipelined and cascadable 18 x 18 multipliers
- Enhanced on-chip differential termination
- Density migration allows ability to migrate to a larger or smaller device within the same package, without changing the pin out as the design changes
- Complex DSP algorithms, such as Forward Error Correction (FEC) codecs, filters, for digital communications and imaging applications
- Up to 9.1 billion multiply and accumulates (MACs) per second
The leading connectivity platform
- Advanced interfacing supports up to 18 different single-ended and differential I/O standards
- Supports most popular and emerging single-ended and differential signaling standards including mini-LVDS and RSDS
- Programmable input delay – used to eliminate hold time violations
- 5 densities- Up to 1.6M system gates
- Supports DDR memory
- Expanded PCI 64/66 compliance and PCI-X 100 MHz compatible
Multi-level memory architecture
- Up to 231 Kb Distributed SelectRAM+™ Memory
- Up to 648Kb Embedded Block RAM
- Popular external memory Interfaces
Configurable logic blocks
- Two slices per CLB – 4 LUT / registers per CLB plus extra carry logic for math and logic functions
- Wide-input functions – 8:1 mux in one CLB
- Fast arithmetic functions – Two look-ahead carry chains per CLB column
- Four cascadable 16-bit addressable shift registers
Precise clock management resources
- All digital delay-locked loop (DLL) in each DCM
- Up to 8 Digital Clock Managers (DCMs) per device
- Flexible frequency generation from 5 MHz to 300 MHz
- Precision phase shift control for 0, 90, 180 or 270 degrees
- Fine grain control (1/256 clock period) for clock data synchronization
- Precise 50/50 duty cycle generation
Why Spartan-3E FPGA?
Lowest total cost. Period.
- Delivers lowest total cost
- Industry’s largest selection of device/package options
- Industry’s most comprehensive IP library
- Leading embedded and DSP solutions
- Efficient, cost-effective board designs
- Allows use of fewer standard components
- Increased system reliability by eliminating external components
Low-cost Embedded Processing platform
Complete design solution for optimal results
- ISE® Foundation™ software
The industry's most complete programmable logic design solution for optimal performance, power management, cost reduction, and productivity
- ISE WebPACK™ software
Our free, easy-to-use logic design solution for your Xilinx CPLD or medium-density FPGA, with all the tools included in ISE Foundation, on both Windows and Linux
- ISE Classics software
A free collection of previously released ISE software tools
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