RocketIO GTP Transceivers

LX Platform  LXT Platform  SXT Platform  Not FXT Platform

Reduce serial I/O power, cost, and complexity

Virtex™-5 FPGA system connectivity technology delivers the lowest power solutions for building high-speed, high-bandwidth connections between chips, boards, and boxes.

The RocketIO™ GTP transceiver for multi-gigabit serial design and proven SelectIO™ technology for parallel I/O enable flexible bridging between emerging serial standards and existing parallel standards.

Our complete solution includes intellectual property cores for protocols and data processing, design tools, and partnerships. Our MicroBlaze™ soft processor cores enable control and protocol processing.

Simplify These Designs:

At a Glance

  • Fourth-generation multi-gigabit transceiver technology : View RocketIO transceiver characterization data
  • Flexible SERDES with 100 Mbps-to-3.75 Gbps operating range supports all popular protocols
  • Cross platform pin compatibility eases design upgrades to GTX transceivers for higher line rates
  • Lowest power consumption in the industry: less than 100 mW per channel at 3.2 Gbps
  • Enables implementation of multiple protocols (standard and custom)in a single FPGA.
  • Designed to work with the PCI Express® endpoint and tri-mode Ethernet MAC blocks in Virtex-5 LXT and SXT platform FPGAs.
  • Compliance with popular standards and protocols for chip to chip, backplanes and optical device interfaces: View protocol-specific characterization reports
  • Advanced Tx / Rx equalization techniques to drive backplanes and other difficult channels
  • Built-in PRBS generator/checker accelerates debug
  • Up to 24 transceivers in Virtex-5 LXT platform devices.

In Depth

Lowest-power serial connectivity

The RocketIO GTP transceiver design consumes less than 100 mW at 3.75 Gbps, the lowest power in the industry and a 77% reduction compared to Virtex-4 FPGAs.

Ease of design

The RocketIO GTP transceiver wizard simplifies configuration with time-saving, menu-driven configuration for PCIe®, XAUI, OC-48, GE interfaces. The tool produces a wrapper, an example design, and a test bench for rapid integration and verification of the serial interface with your custom function.

A wide range of settings for Tx and Rx equalization enable you to tune transceivers for reliable operation on the toughest channels. Built-in PRBS generators and checkers simplify characterization and debug. You can rapidly zero-in on the right setting to achieve maximum design margin. These functions work with industry-standard text equipment as well as Xilinx IBERT tool which provide low-cost, easy-to-use diagnostic capabilities.

Standards support

RocketIO GTP transceivers support all popular serial interface standards. Xilinx offers protocol-specific design kits.

Design-specific Features

Backplane Design
Feature Benefit
Multi-rate support 100 Mbps - 3.75 Gbps
Programmable termination Reduces signal reflections
Simplifies board design
Programmable voltage swing Reduces power consumption
Transmit pre-emphasis Equalizes simple channels
Integrated AC coupling Enables direct interface to other devices
Reduces component count
Linear receive equalization Equalizes difficult channels
Upgrades legacy backplanes
Line Card Design
Feature Benefit
Multi-rate support 100 Mbps - 3.75 Gbps
FPGA fabric Enables integration of processing components (MAC/Framer)
Enables customization
Programmable PCS Enables support for multiple protocols in a single line card
x16 and x20 support Supports SONET traffic
Switching System Design
Feature Benefit
Multi-rate support 100 Mbps - 3.75 Gbps
Up to 24 RocketIO multi-gigabit transceivers Enables multiple port-count density points
Transmit pre-emphasis Equalizes simple backplane channels
Receive equalization Equalizes difficult channels
Enables you to upgrade legacy backplanes
Server and Storage System Design
Feature Benefit
Multi-rate support 100 Mbps - 3.75 Gbps
Enables support for multiple traffic speeds in a single line card
Dynamic reconfiguration port Enables on-the-fly updates of PMA and PCS settings
Electrical idle (out of band signaling) Enables the link to change state
PCI Express compliant
Beaconing (out of band signaling) Enables remote power-on for SAS and SATA
Spread-spectrum clocking PCI Express compliant
SATA compliant
 
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