DSP48E Slice

Higher performance, versatility, and efficiency with lower power

The 550 MHz DSP48E slices available in all Virtex™-5 devices accelerate algorithms and enable higher levels of DSP integration and lower power consumption than previous-generation Virtex devices.

Efficiently add powerful FPGA-based DSP functionality to your system with:

Support for over 40 dynamically controlled operating modes including; multiplier, multiplier-accumulator, multiplier-adder/subtractor, three input adder, barrel shifter, wide bus multiplexers, wide counters, and comparators.
Efficient adder-chain architectures for implementing high-performance filters and complex math efficiently.
Low power requirements: each DSP48E slice draws only 1.38 mW/100 MHz, at a toggle rate of 38%, a 40% reduction from previous-generation slices.

Table 1: Virtex-5 FPGA DSP48E Feature Benefits
Feature	Benefit
25-bit by 18-bit, two's complement multiplier with full precision 48-bit result	Enable higher precision for greater dynamic range, single-precision floating-point math, and wide filters with fewer slices.
Enhanced second stage	Enable three input, flexible 48-bit adder/subtracter with optional registered accumulation feedback. Implement pattern detector for convergent rounding, underflow/overflow detection for saturation arithmetic, and auto-resetting counters/accumulators. Support SIMD operations.
Over 40 dynamic user-controller operating modes	Adapt DSPE slice functions from clock cycle to clock cycle.
18-bit B cascade routing	Support input sample propagation.
New 30-bit A cascade routing	Enable advanced filter implementations and reduce power.
Independent, 48-bit C input	Multiply, add, use large three-operand addition, or flexible rounding mode. Increase usability by eliminating sharing of C input across slices to simplify design and increase performance.
Cascading, 48-bit P bus	Support output propagation of partial results.