2016 Press Releases

Will include discussion of Physically Unclonable Function (PUF) based IP in Zynq UltraScale+ MPSoC devices

FPGA-based platform supports the rapid growth of intelligent applications in the cloud

Company opens order entry for production devices this quarter

New members range from silicon providers to rich ecosystem of partners including design, verification, software, and system vendors

Expanded Spartan, Artix, and Zynq families address next generation any-to-any connectivity, sensor fusion, precision control, image processing, analytics, safety and security

New devices expand processing scalability within the Zynq UltraScale+ family

Ideal for safe and secure products running an advanced user interface

New release also accelerates C/C++ based programming with system level profiling tools and a 50% reduction in end-to-end compile time

Combines 16nm UltraScale+ programmable logic with HBM memory and new accelerator interconnect technology for heterogeneous computing

AMD, ARM, Huawei, IBM, Mellanox, Qualcomm, and Xilinx collaborate on new Cache Coherent Interconnect for Accelerators (CCIX) that will allow multiple processor architectures and accelerators to seamlessly share data

Company adds additional board expertise in key industry, technology, and market trends

Applications include 3D object recognition and machine vision enabled by Zynq SoCs and MPSoCs

Now available in the Vivado Design Suite 2016.1, SmartConnect technology solves the system interconnect bottlenecks for high performance, multi-million system logic cell designs

NGCodec Encoder IP, built with Vivado High Level Synthesis and Kintex UltraScale FPGAs, target the Data Center, Broadcast and Pro A/V markets

SuperVessel will include Xilinx SDAccel Development Environment for FPGA acceleration with C, C++, and OpenCL

Superior product value has made Xilinx’s devices the preferred choice for current and evolving ADAS modules among global OEMs

Offerings include never-before-seen demonstrations of FlexE, Beyond 100G OTN solutions, 16nm UltraScale+ FPGA with integrated RS-FEC, and 56G PAM4 transceiver performance

Enables network equipment providers to focus on end-product innovation and differentiation while reducing time-to-market and total cost of ownership

Customers can now accelerate their designs using Xilinx's 25G, 50G and integrated 100G RS-FEC solutions

Positioned for next generation high density 400G and terabit interfaces; Enabling the next wave of Ethernet deployment

Demonstrations will highlight how Xilinx is enabling differentiated, smarter, and connected applications that are shaping the future of Embedded Vision and Industrial IoT

Complements new 16nm Zynq UltraScale+ MPSoC and software defined SDSoC development environments, enabling the highest levels of differentiation and flexibility

New program targets solutions for emerging workload applications such as machine learning, image and video processing, data analytics, storage data base acceleration, and network acceleration.

Virtex UltraScale Devices: Industry's First FPGA to Support 25Gb per Lane Copper Cabling at Five Meters

Xilinx is actively engaged with more than one hundred customers on the UltraScale+ portfolio with design tools, and has already shipped devices and/or boards to over sixty of these customers

Xilinx OpenAMP framework simplifies heterogeneous system development on the industry's only production available 16nm multi-processing SoC devices

Enabling Any Media over Any Network

All Programmable technology enables smarter, connected, and differentiated ADAS applications with high levels of performance, power and integration