Xilinx Virtex UltraScale+ FPGA VCU118 Evaluation Kit

  • Price: $6,995
  • Part Number: EK-U1-VCU118-G
  • Lead Time: 4 Weeks
  • Device Support:
Overview

Product Description

The Virtex® UltraScale+™ FPGA VCU118 Evaluation Kit is the ideal development environment for evaluating the cutting edge Virtex UltraScale+ FPGAs. Virtex UltraScale+ devices provide the highest performance and integration capabilities in a FinFET node, including both the highest serial I/O and signal processing bandwidth, as well as the highest on-chip memory density.

This kit is ideal for prototyping applications ranging from 1+ Tb/s networking and data center to fully integrated radar/early-warning systems.


Key Features & Benefits

  • Dual 80-bit DDR4 Component Memory
  • RLDRAM3 (2x36-bit) Memory
  • Dual QSFP28 Interfaces
  • PCIe Gen3 x16 (VCCINT = 0.85V)
  • VITA 57.4 FMC+ Interface
  • VITA 57.1 FMC Interface
  • Samtec FireFly Interface

Featured Xilinx Devices

Featuring the VCU118 XCVU9P-L2FLGA2104E FPGA

System Logic Cells (K) 2,586
DSP Slices 6,840
Memory (Mb) 345.9
GTY 32.75 Gb/s Transceivers 120
I/0 832
virtex-ultrascale-plus-bk-chip
Hardware

Board Features

Featuring the Virtex® UltraScale+™ XCVU9P-L2FLGA2104E FPGA

vcu118-board-image

Configuration

  • Onboard JTAG configuration circuitry to enable configuration over USB
  • JTAG header provided for use with Xilinx download cables such as the Platform Cable USB II
  • QSPI flash memory

Communication & Networking

  • 10/100/1000 Mbps Ethernet (SGMII)
  • Dual 4x28Gbps QSFP28 cages
  • Samtec FireFly 4x28Gbps Interface
  • Dual USB-to-UART Bridge with mico-B USB connector
  • RJ45 Ethernet connector
  • PCI Express endpoint Gen3 x 16

Expansion Connectors

  • FMC+ HSPC connector (24 – 28Gbps GTY Transceivers,  80 differential user defined pairs)
  •  FMC HPC1 connector (58 differential user defined pairs)
  •  PMOD header
  •  IIC

Control & I/O

  • User Push Buttons (x5)
  • User DIP Switch (4-position)
  • PMBUS & System Controller MSP430 for power, clocks, SD-Card and I2C bus switching

Memory

  • Two 4 GB DDR4 component memory interfaces (five [256 Mb x 16] devices each)
  • 4 MB RLD3 component memory interfaces (five [256 Mb x 16] devices each)IIC EEPROM: 8Kb
  • Micro Secure Digital (SD) connector 1Gb Quad SPI Flash

Clocking

  • SI5335A Quad Clock Generator
  • Si570 IIC Programmable LVDS Clock Generator
  • SI5328C Clock Multiplier and Jitter Attenuator
  • 2x SMA MGT Reference Clock inputs
  • 1 SMA User Clock input

Display

  • Users & Status LEDs

Power

  • 12V wall adapter or ATX

Featured Xilinx Devices

Featuring the VCU118 XCVU9P-L2FLGA2104E FPGA

System Logic Cells (K) 2,586
DSP Slices 6,840
Memory (Mb) 345.9
GTY 32.75 Gb/s Transceivers 120
I/0 832
virtex-ultrascale-plus-bk-chip

What's Inside

VCU118 Evaluation Board

Featuring the Virtex UltraScale+ XCVU9P-L2FLGA2104E FPGA

Vivado® Design Suite: Design Edition Voucher Code

Node locked & Device-locked to the XCVU9P FPGA, with 1 year of updates

Samtec FMC+ Loopback Cards

Ethernet Cable

Power Cords and Adapter

USB Micro Cable

ATX PCIe Minifit Jr Power Adapter

Samtec FireFly Loopback Cable

Documentation

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Tools & IP

Design

Name Description License Type
Vivado® Design Suite: Design Edition Voucher Code The Xilinx Vivado® Design Suite is a revolutionary IP and System Centric design environment built from the ground up to accelerate the design for FPGAs and SoCs. Node locked & Device-locked to the XCVU9P FPGA, with 1 year of updates

Intellectual Property

Name Description License Type
Memory Interface Generator (MIG) MIG is a free software tool used to generate memory controllers and interfaces for Xilinx FPGAs No-Charge IP
Training & Support
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