Construction of hierarchical Vitis Networking P4 systems, consisting of a large variety of different types of engines including: Parsing, Deparsing, and Match-Action engines

• Parsing engines extract header information from packets
• Deparsing engines manipulate the contents of packet headers by inserting, modifying, or removing packet data
• Action engines are designed for manipulating metadata that might be determined from packets or data originating externally or internally from some other engine
• Look-up engines instantiate memory search IP cores generated from a library for packet processing including: exact match (BCAM), longest-prefix match (STCAM), ternary match (TCAM), and RAM (direct) tables
• Systems resulting in high performance hardware implementations, achieving up to 200 Gb/s

• Support for different clock domains so that engines can run at one of the following frequencies:
  • Line rate of the packet data bus used typically for engines reading or modifying packets
  • Packet rate used for functions that occur once per packet such as an individual look-up
  • Control rate which is the speed of the memory-mapped control interface for controlling and configuring engines
• Software available for high level system simulation of the design prior to running RTL simulations
• System backpressure capability is automatically generated including the insertion of buffers providing dataflow synchronization for engines. This capability enables backpressure of the packet bus for momentarily pausing packet processing
• AXI-Stream signaling protocol for packet interfaces