AR# 33839


Spartan-6 FPGA SP605 - Known Issues and Release Notes Master Answer Record


This answer record lists all known issues with the SP605 Evaluation Kit.


To begin debugging a suspected hardware issue on the SP605, please see (Xilinx Answer 40399) Spartan-6 FPGA SP605 Evaluation Kit - Board Debug Checklist.

To see the Design Advisories associated with the SP605, please see (Xilinx Answer 43768) Design Advisory Master Answer Record for Spartan-6 FPGA SP605 Evaluation Kit.

The SP605 Board Debug Checklist and SP605 Design Advisory Master Answer Record form part of (Xilinx Answer 43745) Xilinx Boards and Kits Solution Center - available to address all questions related to Xilinx Boards and Kits.

Boards and Kits Related Issues

(Xilinx Answer 33319)SP601 - HyperTerminal does not automatically detect USB UART Bridge
(Xilinx Answer 33417)Spartan-6 FPGA MCB - Spartan-6 FPGA Memory Controller User Guide (UG388) incorrectly states that MIG automatically outputs files for the SP601/SP605 reference boards
(Xilinx Answer 33569)Development Boards - Where can I find the USB UART driver?
(Xilinx Answer 34093)SP605 - Change to resistor network values on the MGT_AVCC rail
(Xilinx Answer 37579)What device do I have on my board? Is it an Engineering Sample or Production silicon?
(Xilinx Answer 39210)Boards - Directory structure of CF card changed
(Xilinx Answer 40350)Development Boards - Do Series 6 Evaluation Kits from Xilinx support eFuse?
(Xilinx Answer 40705)Development Boards - BRD GUI on Windows 7
(Xilinx Answer 50596)Xilinx Evaluation Kits - PCIe cards - CE requirements for PC test environment
(Xilinx Answer 53808)Spartan-6 FPGA SP605 Evaluation Kit - Dimensions changed
(Xilinx Answer 55805)Xilinx Evaluation Kits - Board becomes non-operational when TI USB Interface EVM is attached
(Xilinx Answer 56811)Xilinx Evaluation Kits - How do I reprogram the TI power controllers on my board to the factory defaults?
(Xilinx Answer 61849)6 series and 7 series Xilinx Evaluation Kits - Known Issues and Release Notes Master Answer Record for the Texas Instruments Power Solution

Documentation Related Issues

(Xilinx Answer 35087)SP605 User Guide (UG526) - Discrepancies in Pinouts between User Guide and Schematics
(Xilinx Answer 41050)UG525 (v1.2) - Spartan-6 SP605 Getting Started Guide - Typos in Figure 1-1
(Xilinx Answer 42252)UG526 - UART and USB ports labeled incorrectly in Figure 1-2
(Xilinx Answer 46428)XTP065 SP605 PCIe x1 Gen1 Design Creation - S1 should be set to '0000'

PCI Express Related Issues

(Xilinx Answer 33665)11.3 CORE Generator - Why am I unable to select the -3 speed grade for the PCIe core generation for the Spartan-6 FPGA xc6slx45t part that is on the SP605 board?
(Xilinx Answer 34404)SP605 Schematics - PCI Express Endpoint Connectivity section shows clock net name PCIE_250M_N. Should this really be PCIE_125M_N?

Design Tools Related Issues

(Xilinx Answer 34203)11.x ChipScope - IBERT - Spartan-6, Virtex-5, Virtex-6 - PCS loopback results in an increasing error count
(Xilinx Answer 52472)14.x - 6 Series Boards and Kits - Are TRDs and Example Designs available for 14.x?

11.5 Design Tools Information

11.5 includes important updates and supports production devices for the Virtex-6 and Spartan-6 device families. However, several work-arounds might be required for Virtex-6 and some Spartan-6 FPGA customers using ISE 11.5 design tools. 

Please review (Xilinx Answer 32147) before you upgrade to 11.5. These work-arounds are addressed in ISE 12.1 design tools, released in May 2010.

12.1 Design Tools Information

At this time, SP605 Evaluation Kits are not shipped with the 12.1 version of ISE Design Suite.

The reference designs (shipped with the kits and available on-line) are only supported in version 11.4 of the tools.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
43750 Xilinx Boards and Kits Solution Center - Top Issues N/A N/A

Child Answer Records

Associated Answer Records

AR# 33839
Date 08/16/2017
Status Active
Type Known Issues
Boards & Kits
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