AR# 55235

LogiCORE Ten Gigabit Ethernet PCS/PMA v3.0 - 10GBASE-KR - Auto Negotiation with no FEC - Marginal timing seen


When using the Ten Gigabit Ethernet PCS/PMA v3.0 configured for 10GBASE-KR with Auto Negotiation and no FEC, marginal timing has been seen.


When small timing failures are seen, changing Vivado Synthesis and Implementation tool options have been seen to result in passing timing.  Some possibilities include:

- In Synthesis Settings, change control_set_opt_threshold to 60.
- In Implementation Settings under Place Design, set the directive to ExtraPostPlacementOpt.
AR# 55235
Date 04/01/2013
Status Active
Type General Article