The Xilinx Software Developer Solution Center is available to address all questions related to Software Developer. Whether you are starting a new design with the Xilinx Software Developing Tool (SDK) or troubleshooting a problem, use the Software Developer Solution Center to guide you to the right information.
Please refer to the following software developer documentation.
Note: This answer record is part of the Xilinx Software Developer Solution Center (Xilinx Answer 55831) which is available to address all questions related to Software Development within the Xilinx Design Suite.
Whether you are starting a new design with SDK or troubleshooting a problem, use the Software Developer Solution Center to guide you to the right information.
The following answer records cover current known issues as well as commonly asked questions related to software developing with the Xilinx Design Suite.
Note: This answer record is part of the Xilinx Software Developer Solution Center (Xilinx Answer 55831) which is available to address all questions related to Software Developer.
Whether you are starting a new design with the Xilinx Software Developing Tool (SDK) or troubleshooting a problem, use the Software Developer Solution Center to guide you to the right information.
The Top Issues are broken into two categories; System Software and SDK.
System Software Top Issues lists all the issues relating to SDK Drivers, Libraries, and BSP (Base System Platform). SDK Top Issues lists all the issues relating to the SDK tool framework, and GUIs.
Software Developer - Top Issues
System Software - 14.7 - Top Issues
|(Xilinx Answer 58055)||14.7 SDK BSP - The Malloc() in the CortexA9 Standalone BSP delivered with SDK does not work correctly|
|(Xilinx Answer 58107)||14.7 SDK BSP - compiling standalone BSP with armcc compiler fails|
|(Xilinx Answer 58105)||14.7 SDK Libraries - xilskey library doesn't compile|
|(Xilinx Answer 58274)||14.7 SDK Libraries - New xilskey_v1_02_a library|
|(Xilinx Answer 58239)||14.7 SDK Drivers - AXI TFT driver generates BASEADDRESS and HIGHADDRESS as 0x00 in xparameters.h always which is incorrect|
|(Xilinx Answer 58242)||14.7 SDK Drivers - XadcPS self test fails|
|(Xilinx Answer 58347)||14.7 SDK Drivers - UsbPS interrupt example fails|
|(Xilinx Answer 58424)||14.7 SDK - OS - Xilkernel not exiting sleep() if the MicroBlaze Configuration parameter; C_BASE_VECTORS is not set to 0x0|
SDK 14.7 - Top Issues
|(Xilinx Answer 58295)||14.7 SDK - SDK produces an error when trying to user libraries to build|
|(Xilinx Answer 57865)||14.7 SDK - Failed to compile MicroBlaze standalone C++ application on Windows|
|(Xilinx Answer 58075)||14.7 SDK - Debugging an application using the System Debugger throws "Cannot access AFI registers"|
|(Xilinx Answer 59017)||14.7 SDK XMD - How to add debug capability to the SDK flashwriter tool|
System Software - 14.6 - Top Issues
|(Xilinx Answer 57113)||14.6 SDK BSP - PowerPC 440 BSP design fails to compile in SDK|
SDK 14.6 - Top Issues
|(Xilinx Answer 56628)||14.6 SDK - Hardware breakpoints in SDK TCF debugger in Zynq applications|
|(Xilinx Answer 56012)||14.6 SDK - Invalid command name ps7_post_config error while running ps7_post_config method|
|(Xilinx Answer 56632)||14.6 SDK - Cannot configure Programmable Logic from boot image if DDR has ECC enabled|
|(Xilinx Answer 56446)||14.6 SDK - How can I add external interrupts to the GIC on Zynq devices?|
|(Xilinx Answer 56688)||14.6 SDK/XMD - Can a memory dump from SDK/XMD be exported to a text file?|
|(Xilinx Answer 56878)||SDK 14.6/2013.2 - SDK fails to program FPGA if the IPI design, or XPS submodule is deep within the Vivado hierarchy|
|(Xilinx Answer 57113)||SDK 14.6 - PowerPC 440 BSB design fail to compile in SDK|
|(Xilinx Answer 57091)||SDK 14.6 - Cannot generate Memory Test application after exporting IPI design to SDK|
SDK 14.5 - Top Issues
|(Xilinx Answer 55487)||14.5 SDK - SDK is displaying lots of "Type xxx could not be resolved" errors in the SDK editor on a previously working SDK project|
|(Xilinx Answer 54981)||14.5 SDK - XMD error when trying to launch XMD from within SDK when using the Digilent SDK Cable|
|(Xilinx Answer 55548)||14.5 SDK - Cannot launch SDK from within the XPS tool in 14.5|
|(Xilinx Answer 54999)||14.5 EDK, SDK - ARM Compilation fails on imported C++ applications in SDK|
|(Xilinx Answer 55636)||14.5 SDK - ps7_init.tcl generated by pre-defined XML in SDK does not match the one created in XPS and exported to SDK|
|(Xilinx Answer 55429)||14.5 SDK, XMD - The endianness Memory Window in SDK and XMD are not consistent|
|(Xilinx Answer 55397)||14.5 SDK, XMD - Zynq SoC CPU naming not consistent across SDK and XMD|
|(Xilinx Answer 55562)||14.5 SDK - Bootgen crashes when relative path is used to specify the location of the BIF|
|(Xilinx Answer 55150)||14.5 EDK - SDK - Program FPGA while board is up and running causes suspension of SoC cores|
|(Xilinx Answer 52652)||14.5 EDK, SDK - Cannot connect to MDM through XMD on Virtex-7 1140T and Virtex-7 2000T devices|
|(Xilinx Answer 55431)||14.5 SDK - JTAG Cable Auto Detect always selects TCF when Digilent cable is used|
|(Xilinx Answer 56044)||14.5 XPS, SDK - Can I run the FSBL without a DDR connected on the Zynq SoC Processing System|
|(Xilinx Answer 55621)||14.5 SDK - Build Automatically on .h files does not work|
|(Xilinx Answer 55581)||14.5 SDK - FSL fails to compile with error "cannot find -lrsa"|
|(Xilinx Answer 55523)||14.5 SDK, Flash Writer - Offset option (required for multiboot and fallback flow) does not work|
|(Xilinx Answer 55811)||14.5 SDK - SDK crashes when I try to modify BSP settings for Zynq containing a device tree|
14.4 - Top Issues
|(Xilinx Answer 52971)||14.4 SDK - ARM Compiler is failing with applications containing sin, cos, tan functions in SDK|
|(Xilinx Answer 53955)||14.4 SDK - Cannot compile ARM application on Windows 7 64-bit OS|
|(Xilinx Answer 54556)||14.4 SDK - Program FPGA button is unresponsive in Zynq SoC projects|
|(Xilinx Answer 54352)||14.4 SDK - IP created in CIP (Create or Import Peripheral) Wizard in XPS is failing in SDK libgen as xio.h and xbasic_types.h cannot be found|
|(Xilinx Answer 53066)||14.4 SDK - SDK fails during BSP build with system containing AXI Ethernet IP on Zynq|
|(Xilinx Answer 54589)||14.4 SDK - Board Support Package fails to compile with Xil ISF v3.0 on Zynq SoC using hard Quad SPI|
|(Xilinx Answer 54971)||14.4 SDK, Zynq-7000 SoC - Specifying explicit offset for data files in BIF generates incorrect .MCS but correct .BIN|