You are using a deprecated Browser. Internet Explorer is no longer supported by Xilinx.
10-Gigabit Ethernet PCS/PMA (10GBASE-R/10GBASE-KR) v4.1 - PMA or PCS Reset during MDIO transaction could result in missed operation
When using the 10-Gigabit Ethernet PCS/PMA (10GBASE-R/10GBASE-KR) v4.1 or earlier, a
'soft' PMA or PCS reset causes the MDIO interface logic to be reset.
If this happens during an MDIO access, this might result in the MDIO operation being missed.
This has been resolved in v4.1 (Rev. 1) of the 10-Gigabit Ethernet PCS/PMA (10GBASE-R/10GBASE-KR) core.
Was this Answer Record helpful?
- 10 Gigabit Ethernet PCS-PMA with FEC/Auto-Negotiation for backplanes (10GBASE-KR)
- Ten Gigabit Ethernet PCS/PMA