Performance and Resource Utilization for CORDIC v6.0

Vivado Design Suite Release 2020.2

Interpreting the results

This page contains maximum frequency and resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

Data is provided for the following device families:

Kintex-7

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
Functional_Selection
Architectural_Configuration
Pipelining_Mode
Data_Format
Input_Width
Output_Width
Round_Mode
Coarse_Rotation
optimize_goal
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xc7k480t ffg901 -1 k7_1_atan_par16_nb Arc_Tan Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 396 890 895 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_atan_par32_nb Arc_Tan Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 325 3460 3437 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_atan_par48_nb Arc_Tan Parallel Optimal SignedFraction 48 48 Truncate true Performance aclk 292 7640 7598 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_atan_ser16_nb Arc_Tan Word_Serial Optimal SignedFraction 16 16 Truncate true Performance aclk 308 310 230 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_atan_ser32_nb Arc_Tan Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 260 615 422 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_rot_par16_nb Rotate Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 450 1075 1057 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_rot_par32_nb Rotate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 358 3776 3758 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_rot_ser32_nb Rotate Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 260 856 669 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_sincos_par32_nb Sin_and_Cos Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 418 3595 3622 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_sincos_ser32_nb Sin_and_Cos Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 254 662 532 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_sqrt_ser48_nb Square_Root Parallel Optimal UnsignedFraction 48 48 Truncate false Performance aclk 188 2182 1328 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k480t ffg901 -1 k7_1_trans_par32_nb Translate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 325 3549 3615 0 0 0 PRODUCTION 1.12 2017-02-17

Kintex UltraScale

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
Functional_Selection
Architectural_Configuration
Pipelining_Mode
Data_Format
Input_Width
Output_Width
Round_Mode
Coarse_Rotation
optimize_goal
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcku115 flva1517 -1 ku_1_atan_par16_nb Arc_Tan Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 500 910 895 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_atan_par32_nb Arc_Tan Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 402 3458 3436 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_atan_par48_nb Arc_Tan Parallel Optimal SignedFraction 48 48 Truncate true Performance aclk 352 7625 7598 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_atan_ser16_nb Arc_Tan Word_Serial Optimal SignedFraction 16 16 Truncate true Performance aclk 363 312 230 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_atan_ser32_nb Arc_Tan Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 336 633 421 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_rot_par16_nb Rotate Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 511 1058 1058 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_rot_par32_nb Rotate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 467 3763 3763 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_rot_ser32_nb Rotate Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 308 856 668 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_sincos_par32_nb Sin_and_Cos Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 467 3535 3625 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_sincos_ser32_nb Sin_and_Cos Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 336 697 534 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_sqrt_ser48_nb Square_Root Parallel Optimal UnsignedFraction 48 48 Truncate false Performance aclk 238 2281 1338 0 0 0 PRODUCTION 1.26 12-04-2018
xcku115 flva1517 -1 ku_1_trans_par32_nb Translate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 435 3572 3616 0 0 0 PRODUCTION 1.26 12-04-2018

Kintex UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
Functional_Selection
Architectural_Configuration
Pipelining_Mode
Data_Format
Input_Width
Output_Width
Round_Mode
Coarse_Rotation
optimize_goal
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcku13p ffve900 -1 kup_1_atan_par16_nb Arc_Tan Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 757 911 898 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_atan_par32_nb Arc_Tan Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 647 3481 3440 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_atan_par48_nb Arc_Tan Parallel Optimal SignedFraction 48 48 Truncate true Performance aclk 522 7651 7599 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_atan_ser16_nb Arc_Tan Word_Serial Optimal SignedFraction 16 16 Truncate true Performance aclk 549 319 230 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_atan_ser32_nb Arc_Tan Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 478 629 421 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_rot_par16_nb Rotate Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 844 1066 1056 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_rot_par32_nb Rotate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 708 3769 3765 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_rot_ser32_nb Rotate Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 440 860 668 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_sincos_par32_nb Sin_and_Cos Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 757 3537 3630 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_sincos_ser32_nb Sin_and_Cos Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 489 697 530 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_sqrt_ser48_nb Square_Root Parallel Optimal UnsignedFraction 48 48 Truncate false Performance aclk 347 2217 1336 0 0 0 PRODUCTION 1.28 02-27-2020
xcku13p ffve900 -1 kup_1_trans_par32_nb Translate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 642 3581 3621 0 0 0 PRODUCTION 1.28 02-27-2020

Versal ACAP

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
Functional_Selection
Architectural_Configuration
Pipelining_Mode
Data_Format
Input_Width
Output_Width
Round_Mode
Coarse_Rotation
optimize_goal
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcvm1802 vfvc1760 1LP ver_1_atan_par16_nb Arc_Tan Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 494 969 896 0 0 0 ENGINEERING-SAMPLE 1.04 10-18-2020
xcvm1802 vfvc1760 1LP ver_1_atan_par32_nb Arc_Tan Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 456 3627 3441 0 0 0 ENGINEERING-SAMPLE 1.04 10-18-2020
xcvm1802 vfvc1760 1LP ver_1_atan_par48_nb Arc_Tan Parallel Optimal SignedFraction 48 48 Truncate true Performance aclk 407 7847 7602 0 0 0 ENGINEERING-SAMPLE 1.04 10-18-2020
xcvm1802 vfvc1760 1LP ver_1_atan_ser16_nb Arc_Tan Word_Serial Optimal SignedFraction 16 16 Truncate true Performance aclk 358 335 232 0 0 0 ENGINEERING-SAMPLE 1.04 10-18-2020
xcvm1802 vfvc1760 1LP ver_1_atan_ser32_nb Arc_Tan Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 314 656 423 0 0 0 ENGINEERING-SAMPLE 1.04 10-18-2020
xcvm1802 vfvc1760 1LP ver_1_rot_par16_nb Rotate Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 544 1132 1061 0 0 0 ENGINEERING-SAMPLE 1.04 10-18-2020
xcvm1802 vfvc1760 1LP ver_1_rot_par32_nb Rotate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 505 3957 3767 0 0 0 ENGINEERING-SAMPLE 1.04 10-18-2020
xcvm1802 vfvc1760 1LP ver_1_rot_ser32_nb Rotate Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 319 969 671 0 0 0 ENGINEERING-SAMPLE 1.04 10-18-2020
xcvm1802 vfvc1760 1LP ver_1_sincos_par32_nb Sin_and_Cos Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 505 3757 3625 0 0 0 ENGINEERING-SAMPLE 1.04 10-18-2020
xcvm1802 vfvc1760 1LP ver_1_sincos_ser32_nb Sin_and_Cos Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 319 756 531 0 0 0 ENGINEERING-SAMPLE 1.04 10-18-2020
xcvm1802 vfvc1760 1LP ver_1_sqrt_ser48_nb Square_Root Parallel Optimal UnsignedFraction 48 48 Truncate false Performance aclk 286 1964 1344 0 0 0 ENGINEERING-SAMPLE 1.04 10-18-2020
xcvm1802 vfvc1760 1LP ver_1_trans_par32_nb Translate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 424 3761 3617 0 0 0 ENGINEERING-SAMPLE 1.04 10-18-2020

Virtex-7

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
Functional_Selection
Architectural_Configuration
Pipelining_Mode
Data_Format
Input_Width
Output_Width
Round_Mode
Coarse_Rotation
optimize_goal
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xc7vx690t ffg1157 -1 v7_1_atan_par16_nb Arc_Tan Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 440 900 895 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_atan_par32_nb Arc_Tan Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 358 3471 3437 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_atan_par48_nb Arc_Tan Parallel Optimal SignedFraction 48 48 Truncate true Performance aclk 286 7618 7598 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_atan_ser16_nb Arc_Tan Word_Serial Optimal SignedFraction 16 16 Truncate true Performance aclk 292 301 230 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_atan_ser32_nb Arc_Tan Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 260 615 422 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_rot_par16_nb Rotate Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 450 1072 1053 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_rot_par32_nb Rotate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 385 3812 3758 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_rot_ser32_nb Rotate Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 254 853 669 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_sincos_par32_nb Sin_and_Cos Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 413 3595 3623 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_sincos_ser32_nb Sin_and_Cos Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 249 661 532 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_sqrt_ser48_nb Square_Root Parallel Optimal UnsignedFraction 48 48 Truncate false Performance aclk 188 2181 1328 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 -1 v7_1_trans_par32_nb Translate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 363 3577 3614 0 0 0 PRODUCTION 1.11 2014-09-11

Virtex UltraScale

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
Functional_Selection
Architectural_Configuration
Pipelining_Mode
Data_Format
Input_Width
Output_Width
Round_Mode
Coarse_Rotation
optimize_goal
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcvu160 flgb2104 -1 vu_1_atan_par16_nb Arc_Tan Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 505 908 897 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_atan_par32_nb Arc_Tan Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 450 3471 3436 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_atan_par48_nb Arc_Tan Parallel Optimal SignedFraction 48 48 Truncate true Performance aclk 347 7653 7598 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_atan_ser16_nb Arc_Tan Word_Serial Optimal SignedFraction 16 16 Truncate true Performance aclk 352 307 230 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_atan_ser32_nb Arc_Tan Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 325 614 424 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_rot_par16_nb Rotate Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 494 1063 1057 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_rot_par32_nb Rotate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 456 3767 3761 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_rot_ser32_nb Rotate Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 330 854 670 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_sincos_par32_nb Sin_and_Cos Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 450 3536 3622 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_sincos_ser32_nb Sin_and_Cos Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 336 699 531 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_sqrt_ser48_nb Square_Root Parallel Optimal UnsignedFraction 48 48 Truncate false Performance aclk 238 2185 1336 0 0 0 PRODUCTION 1.27 12-04-2018
xcvu160 flgb2104 -1 vu_1_trans_par32_nb Translate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 435 3574 3616 0 0 0 PRODUCTION 1.27 12-04-2018

Virtex UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
Functional_Selection
Architectural_Configuration
Pipelining_Mode
Data_Format
Input_Width
Output_Width
Round_Mode
Coarse_Rotation
optimize_goal
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcvu9p flgb2104 -1 vup_1_atan_par16_nb Arc_Tan Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 779 909 898 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_atan_par32_nb Arc_Tan Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 577 3476 3439 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_atan_par48_nb Arc_Tan Parallel Optimal SignedFraction 48 48 Truncate true Performance aclk 440 7621 7598 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_atan_ser16_nb Arc_Tan Word_Serial Optimal SignedFraction 16 16 Truncate true Performance aclk 544 312 230 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_atan_ser32_nb Arc_Tan Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 472 620 421 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_rot_par16_nb Rotate Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 844 1068 1060 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_rot_par32_nb Rotate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 664 3765 3767 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_rot_ser32_nb Rotate Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 467 854 668 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_sincos_par32_nb Sin_and_Cos Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 719 3540 3630 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_sincos_ser32_nb Sin_and_Cos Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 489 693 530 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_sqrt_ser48_nb Square_Root Parallel Optimal UnsignedFraction 48 48 Truncate false Performance aclk 330 2213 1332 0 0 0 PRODUCTION 1.27 02-28-2020
xcvu9p flgb2104 -1 vup_1_trans_par32_nb Translate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 593 3553 3617 0 0 0 PRODUCTION 1.27 02-28-2020

Zynq UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
Functional_Selection
Architectural_Configuration
Pipelining_Mode
Data_Format
Input_Width
Output_Width
Round_Mode
Coarse_Rotation
optimize_goal
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xczu9eg ffvb1156 -1 zup_1_atan_par16_nb Arc_Tan Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 785 915 898 0 0 0 PRODUCTION 1.29 08-03-2020
xczu9eg ffvb1156 -1 zup_1_atan_par32_nb Arc_Tan Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 642 3465 3445 0 0 0 PRODUCTION 1.29 08-03-2020
xczu9eg ffvb1156 -1 zup_1_atan_par48_nb Arc_Tan Parallel Optimal SignedFraction 48 48 Truncate true Performance aclk 533 7647 7599 0 0 0 PRODUCTION 1.29 08-03-2020
xczu9eg ffvb1156 -1 zup_1_atan_ser16_nb Arc_Tan Word_Serial Optimal SignedFraction 16 16 Truncate true Performance aclk 549 308 232 0 0 0 PRODUCTION 1.29 08-03-2020
xczu9eg ffvb1156 -1 zup_1_atan_ser32_nb Arc_Tan Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 461 616 421 0 0 0 PRODUCTION 1.29 08-03-2020
xczu9eg ffvb1156 -1 zup_1_rot_par16_nb Rotate Parallel Optimal SignedFraction 16 16 Truncate true Performance aclk 844 1072 1060 0 0 0 PRODUCTION 1.29 08-03-2020
xczu9eg ffvb1156 -1 zup_1_rot_par32_nb Rotate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 713 3773 3767 0 0 0 PRODUCTION 1.29 08-03-2020
xczu9eg ffvb1156 -1 zup_1_rot_ser32_nb Rotate Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 461 855 668 0 0 0 PRODUCTION 1.29 08-03-2020
xczu9eg ffvb1156 -1 zup_1_sincos_par32_nb Sin_and_Cos Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 730 3536 3631 0 0 0 PRODUCTION 1.29 08-03-2020
xczu9eg ffvb1156 -1 zup_1_sincos_ser32_nb Sin_and_Cos Word_Serial Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 494 693 535 0 0 0 PRODUCTION 1.29 08-03-2020
xczu9eg ffvb1156 -1 zup_1_sqrt_ser48_nb Square_Root Parallel Optimal UnsignedFraction 48 48 Truncate false Performance aclk 336 2205 1336 0 0 0 PRODUCTION 1.29 08-03-2020
xczu9eg ffvb1156 -1 zup_1_trans_par32_nb Translate Parallel Optimal SignedFraction 32 32 Nearest_Even true Performance aclk 631 3584 3620 0 0 0 PRODUCTION 1.29 08-03-2020

COPYRIGHT

Copyright 2021 Xilinx, Inc. Xilinx, the Xilinx logo, Alveo, Artix, ISE, Kintex, Spartan, Versal, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. Arm is a registered trademark of Arm Limited in the EU and other countries. All other trademarks are the property of their respective owners.

LEGAL INFORMATION: PLEASE READ

The information disclosed to you hereunder (the "Materials") is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and (2) Xilinx shall not be liable (whether in contract or tort, including negligence, or under any other theory of liability) for any loss or damage of any kind or nature related to, arising under, or in connection with, the Materials (including your use of the Materials), including for any direct, indirect, special, incidental, or consequential loss or damage (including loss of data, profits, goodwill, or any type of loss or damage suffered as a result of any action brought by a third party) even if such damage or loss was reasonably foreseeable or Xilinx had been advised of the possibility of the same. Xilinx assumes no obligation to correct any errors contained in the Materials or to notify you of updates to the Materials or to product specifications. You may not reproduce, modify, distribute, or publicly display the Materials without prior written consent. Certain products are subject to the terms and conditions of Xilinx's limited warranty, please refer to Xilinx's Terms of Sale which can be viewed at https://www.xilinx.com/legal.htm#tos; IP cores may be subject to warranty and support terms contained in a license issued to you by Xilinx. Xilinx products are not designed or intended to be fail-safe or for use in any application requiring fail-safe performance; you assume sole risk and liability for use of Xilinx products in such critical applications, please refer to Xilinx's Terms of Sale which can be viewed at https://www.xilinx.com/legal.htm#tos.