On-Demand Training

Visit the Xilinx Customer Training Center to access our library of training materials across a variety of subjects.

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On-Demand Courses for Free
Getting Started with the Xilinx Versal ACAP Platform
This course introduces the Versal™ ACAP architecture and design methodology. This is a one-day version of the Designing with the Versal ACAP: Architecture and Methodology On-Demand course available for purchase.
Using Accelerated Applications with the Vision AI Starter Kit & System-on-Module (SOM)
This course will help you learn about the Xilinx Kria™ System-On-Module (SOM) and Vision AI Starter Kit, enabling you to accelerate applications using the Vision AI Starter Kit right out of the box without any installation or FPGA knowledge.
Using Xilinx Alveo Cards to Accelerate Dynamic Workloads
This course is an overview of the Alveo™ Data Center accelerator cards with an emphasis on learning on how to run a design on Alveo cards using the Vitis™ unified software platform. 
Versal ACAP Training Event Recordings
The following are the recorded versions of the online Getting Started with the Xilinx Versal ACAP Platform training events delivered by live instructors. These sessions were held in March 2021.
On-Demand Courses for Purchase
Accelerating Applications with the Vitis Unified Software Platform
Learn how to develop, debug, and profile new or existing C/C++ and RTL applications in the Vitis unified software environment targeting both data center (DC) and embedded applications.
Designing FPGAs Using the Vivado Design Suite 1
This course offers introductory training on the Vivado Design Suite and demonstrates the FPGA design flow for those uninitiated to FPGA design.
Designing FPGAs Using the Vivado Design Suite 2
Learn how to build a more effective FPGA design. This course builds on the concepts from the Designing FPGAs Using the Vivado Design Suite 1 course.
Designing FPGAs Using the Vivado Design Suite 3
Learn how to effectively employ timing closure techniques. This course builds on the concepts from the previous Designing FPGAs Using the Vivado Design Suite courses.
Designing FPGAs Using the Vivado Design Suite 4
Learn how to use the advanced aspects of the Vivado Design Suite and Xilinx hardware. This course buildes on the concepts from the previous Designing FPGAs Using the Vivado Design Suite courses.
Designing with the UltraScale and UltraScale+ Architectures
Introduces the UltraScale™ and UltraScale+™ architectures to both new and experienced designers.
Designing with the Versal ACAP: Architecture and Methodology
Learn about Versal™ ACAP architecture and design methodology.
Designing with the Versal ACAP: Network on Chip
Introduces the Versal ACAP network on chip (NoC) to users familiar with Xilinx devices.
Designing with the Versal ACAP: PCI Express
Introduces the features and capabilities of the PCIe® and Cache Coherent Interconnect blocks in the Versal architecture. 
Designing with the Versal ACAP: Power and Board Design
Provides a system-level understanding of power and thermal issues related to designing with the Versal™ ACAP
Designing with the Zynq UltraScale+ RFSoC
This course provides an overview of the hard block capabilities for the Zynq® UltraScale+ RFSoC family with a special emphasis on the Data Converter and Soft-Decision FEC blocks.
Designing with Verilog
Provides a thorough introduction to the Verilog language.
Designing with Versal AI Engine 1: Architecture and Design Flow
This course describes the Versal AI Engine architecture, how to program the AI Engine, the data communications between the PL and AI Engines, how to analyze the kernel program using various debugger features.
Designing with Versal AI Engine 2: Graph Programming with AI Engine Kernels
Describes the system design flow and interfaces that can be used for data movements in the Versal AI Engine.
Designing with VHDL
Provides a thorough introduction to the VHDL language.
Developing AI Inference Solutions with the Vitis AI Platform
This course describes how to use the Vitis AI development platform in conjunction with DNN algorithms, models, inference and training, and frameworks on cloud and edge computing platforms.
Developing Multimedia Solutions with the Video Codec Unit Using the GStreamer Framework
Learn how to build and run complex multimedia applications targeting Zynq UltraScale+ MPSoC EV devices with the help of the GStreamer framework.
Embedded Design with PetaLinux Tools
This course provides embedded systems developers experience with creating an embedded Linux system targeting Xilinx SoCs using the PetaLinux tools.
Embedded Systems Design
Highlights the general embedded concepts, tools, and techniques using the Vivado Design Suite.
Embedded Systems Software Design
This course introduces the concepts, tools, and techniques required for software design and development.
High-Level Synthesis with the Vitis HLS Tool
This course provides a thorough introduction to the Vitis® High-Level Synthesis (HLS) tool.
Migrating to the Vitis Embedded Software Development IDE Workshop
This workshop demonstrates the tools and techniques required for software design and development using the Vitis unified software platform.
UltraFast Design Methodology
Learn how to improve design speed and reliability by using theUltraFast Design Methodology and the Vivado Design Suite.
Zynq UltraScale+ MPSoC for the Hardware Designer
This course provides hardware designers with an overview of the capabilities and support for the Zynq UltraScale+ MPSoC family from a hardware architectural perspective.
Zynq UltraScale+ MPSoC for the Software Developer
This course provides software developers with an overview of the capabilities and support for the Zynq UltraScale+ MPSoC family from a software development perspective.
Zynq UltraScale+ MPSoC for the System Architect
This course provides system architects with an overview of the capabilities and support for the Zynq UltraScale+ MPSoC family.