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DSP

DSP Solution

Xilinx products - 7 series FPGAs and Zynq-7000 All Programmable SoCs, UltraScale FPGAs, and UltraScale+ FPGAs and MPSoCs - combine massive DSP processing bandwidth at low power with easy to use design. Xilinx provides a complete DSP solution complete with silicon, IP, reference designs, development kits, FMC daughter cards, tool flows, and training.

Maximum DSP Capabilities Zynq-7000 AP SoCs 7 Series FPGAs
UltraScale FPGAs UltraScale+ FPGAs UltraScale+ MPSoCs
Logic Cells / System Logic Cells 444,000 1,954,560 1,160,880 3,780,000 914,000
Block RAM (Mb) 3 68 76 94.5 34.6
DSP Slices 2,020 3,600 5,520 12,288 3,528
Fixed-Point Performance (GMACs) 1,497 2,668 4,090 10,948 3,143
Fixed-Point Performance for Symmetric Filters (GMACs) 2,994 5,335 8,181 21,897 6,286
Single Precision Floating-Point Performance (GFLOPs) 468 833 1,739 4,600 1,333
Half Precision Floating-Point Performance (GLOPs)
935 1,667 3,478 9,200 2,666
Transceivers Count
16 96 64 128 76
Transceiver Performance (Gb/s)
10.312 12.5
13.1
28.05
16.3
30.5
16.3
32.5
6.0
16.3
32.5

Note: Zynq-7000 SoCs and 7 series FPGAs are measured in logic cells, UltraScale FPGAs and UltraScale+ FPGAs and MPSoCs are measured in System Logic Cells

UltraScale Architecture for DSP

Based on ASIC-class architecture, UltraScale families combine multi-hundred gigabit-per-second system I/O bandwidth with over 20 teraflops of system processing performance that meet the challenges of next generation signal processing systems.

The DSP48 Slice

The key to the UltraScale architecture DSP performance is the 5th generation DSP48E2 slice.  This dedicated DSP processing block is implemented in full custom silicon that delivers industry leading power / performance.  UltraScale architecture builds on the success of 7 series with further enhancements for floating-point, complex arithmetic and rounding commonly used in wireless and high-performance compute applications.