AR# 76498


Vitis 2021.x - Known Issues


The Vitis Environment Release Notes, Installation, and Licensing Guide found on contains installation instructions, system requirements, and other general information.

This Known Issues Answer Record is a supplement to the release notes documentation and contains links to information on known issues in the design tools that might be resolved in future versions.


Vitis Unified Software Platform 2021.1 is now available:

  • Xilinx Kria System-on-Modules (SOMs) KV260 platform support. The full Vitis flow for ML (DPU inference engine) + X (RTL kernel and Vitis HLS based computer vision kernels) is available.
  • Support added for C/C++ Vision, DSP, Graph (Louvain Modularity), Codec in image processing, Compression (GZIP, Facebook ZSTD, ZLIB Whole Application Acceleration) performance-optimized libraries on FPGA and/or Versal ACAP over CPU/GPUs.
  • The Vitis Core Development Kit enhances design flow on Versal ACAP devices, providing visualization improvements for AI Engine design trace report, AI Engine event tracing via GMIO, incremental recompile, a new Boot Image Wizard and encrypted AI Engine source file support.
  • The new Vitis Model Composer tool enables rapid design exploration and verification within the MathWorks Simulink® environment, enabling co-simulation of blocks targeting AI Engines and Programmable Logic, code generation, and test bench creation.
  • Use the new Vitis HLS Flow Navigator GUI for quick access to flow phases and reports. It merges synthesis, analysis and debug views into a general default context.


Vitis 2021.1 Known Issues:

(Xilinx Answer 76503) XRT 2021.1 Operating System End-of-Life Support Notification
(Xilinx Answer 76517) License management tool upgraded to Flexlm
(Xilinx Answer 76555) What is new in the Vitis HLS 2021.1 GUI?
(Xilinx Answer 76616) Vitis 2021.1 - Install - Install hangs on Ubuntu 20.04
(Xilinx Answer 76585) Vivado 2020.x - couldn't load file "": cannot open shared object file: No such file or directory
(Xilinx Answer 76537) Vitis 2021.1 - Profile data files not generated during HW_EMU flow for lab8 template example in GUI mode
(Xilinx Answer 76538) Vitis 2021.1 - For loop to memset conversions observed with GCC 10.2 + O2 optimization
(Xilinx Answer 76524) Vitis 2021.1 - Ubuntu20.04: HTML links under Help menu do not open in browser
(Xilinx Answer 76669) Vitis 2021.1 - DDR mapped at DDR_LOW0 region does not show up in the Vitis generated linker script
(Xilinx Answer 76682) Vitis 2021.1 - [ZCU102_base-platform] Debugging the vadd application on emulator stops at main


Xilinx Forums:

Please seek technical support via the Vitis Acceleration, SDAccel, SDSoC. The Xilinx Forums are a great resource for technical support.

The entire Xilinx Community is available to help here, and you can ask questions and collaborate with Xilinx experts to get the solutions you need.

AR# 76498
Date 09/17/2021
Status Active
Type Known Issues
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