The resources on this page are designed to give you everything you need to achieve reliable system-level designs with Xilinx FPGAs on the first try.
Feature size reduction and the need for reduced power consumption have driven core voltages down from the old standard of 3.3V to the 0.9V range. This change in voltage and signal frequency content requires us to use new design practices that take into account electrical effects that could previously be ignored.
Xilinx 7 Series FPGAs offer a portfolio of transceivers that runs from 500Mb/s up to 28Gb/s data rates.
Xilinx high speed transceivers are designed with features that provide the best signal integrity. Shown below are the features that enable this through the use of the following:
The following white papers are designed to teach readers how to use multiple EDA tools with Xilinx models (such as Agilent ADS) to perform FPGA signal and power integrity simulations.
When designing a board with elaborate ICs such as FPGAs, it is important to calculate the FPGA demand on the PCB and vice-versa. Below you will find information on signal integrity, static and dynamic power, and SSO:
Xilinx offers high-density package routing information, a detailed PCB design checklist and many other resources to ensure that you consider all the issues when designing a PCB.