7 Series Integrated Block for PCI Express (PCIe)


Product Description

AMD provides a 7 Series FPGA solution for PCI Express® (PCIe) to configure the 7 Series FPGA Integrated Block for PCIe and includes additional logic to create a complete solution for PCIe. This AMD Block Wrapper for PCIe simplifies the design process and reduces time-to-market. Many easy-to-use features and optimal configuration for Endpoint and Root Port applications are available at no additional cost. This solution can be used in communication, multimedia, server and mobile platforms and enables applications such as high-end medical imaging, graphics intensive video games, DVD quality streaming video on the desktop and 10 Gigabit Ethernet interface cards. This core combined with other AMD connectivity solutions helps customers preserve their investment in older technologies by allowing seamless bridging to other standard and proprietary interfaces.

Key Features and Benefits

  • Compliant with the PCI Express Base Specification  2.1
  • Fully compliant with PCI Express transaction ordering rules
  • Supports maximum payload of 1024 bytes (for most configurations)
  • 1 Virtual Channel
  • Supported Lane width: x1, x2, x4 and x8
  • Bandwidth scalability interconnect width
  • Pre-implemented optimal buffering for high bandwidth applications
  • Uses 7 series Transceivers
  • Design verified by a AMD proprietary testbench



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