The UHD Serial Digital Interface (UHD-SDI), is widely used in broadcast applications for the transport of uncompressed digital video streams up to 4K resolutions over coax cable. Xilinx offers two solutions for implementing SDI interfaces on Xilinx devices.
The UHD SDI LogiCORE IP can be implemented in Xilinx 7-series and UltraScale FPGAs. Users can implement one to many 4K processing channels including capture and display on a single FPGA using UHD-SDI IP and Video processing cores from Xilinx and its partners. The UHD SDI LogiCORE IP is designed based on applicable SMPTE standards.
UHD-SDI subsystems is new and supports US+ devices and has all the features of UHD-SDI logiCORE IP and additionally gives users option to map SDI native video to AXI4-Stream Video interface, and AXI4-lite control interface for use with a processor such as Microblaze or Arm subsystem
Key Features and Benefits
The core supports the following SMPTE standards:
SMPTE ST 259: SD-SDI at 270 Mb/s
SMPTE RP 165: EDH for SD-SDI
SMPTE ST 292: HD-SDI at 1.485 Gb/s and 1.485/1.001 Gb/s
SMPTE ST 372: Dual Link HD-SDI (by instantiation of two UHD-SDI cores)
SMPTE ST 424: 3G-SDI with data mapped by any ST 425-x mapping at 2.97 Gb/s and 2.97/1.001 Gb/s.SMPTE ST 2081-1: 6G-SDI with data mapped by any ST 2081-x mapping at 5.94 Gb/s and 5.94/1.001 Gb/s (including multi-link 6G-SDI)
SMPTE ST 2082-1: 12G-SDI with data mapped by any ST 2082-x mapping at 11.88 Gb/s and 11.88/1.001 Gb/s (including multi-link 12G-SDI)
Dual link and Quad link 6G-SDI and 12G-SDI are supported by instantiating two or four UHD-SDI cores
UHD-SDI subsystem additionally offers users with
Option to map SDI video on to AXI4-Stream Video
Option for Processor control via AXI4-Lite with bare metal and linux drivers
Application design example targeting ZCU106 in Vivado (2017.3)