Wired & Wireless Testers

Enabling Next Generation Testers for Data Center, Wired and Wireless Networks

Overview

Data Center testers require the highest serial I/O throughput and thermally efficient solution to implement PCS, FEC, and MAC. Xilinx® Versal™ Premium series offers 112G PAM4 transceivers as well as massive networked hard IP for: 600G channelized multirate Ethernet subsystem (DCMAC) with KP4/KR4 FEC, integrated 600G Interlaken with FEC, and 400G High-Speed Crypto (HSC) Engines to enable the fastest and most advanced test equipment.

Wireless testers require signal processing as well as high I/O count for interfacing with data-converters, CPU, and memory. Versal Premium series offers 33TOPs of DSP bandwidth, 9Tb/s serial I/O bandwidth, and 1,118Tb/s of internal and external memory bandwidth to provide the high-performance compute density.

Design Examples	Description	Device Support
Click to enlarge	Mobile Phone Tester Mobile Phone Tester emulates a network and, as such, requires an adaptable platform with rich resources including hardened DSP blocks, and memory to implement the baseband and digital front end (DFE) functions of different cellular standards. Support for different parallel and serial I/O interfaces is also needed to interface to DAC/ADC, processors, and memory banks. Versal Premium series offers superior performance/watts to realize high-performance mobile phone tester. Zynq® UltraScale+™ RFSoC offers resource and power-efficient solutions for LPDC and Turbo FEC.	Zynq UltraScale+ RFSoC Versal Premium series
Click to enlarge	Ethernet Tester: Layer 1-3 Xilinx Versal Premium series with its 112G PAM4 transceivers providing 9Tb/s of serial bandwidth enables high bandwidth to interconnect to optics, backplane, and chip-to-chip. It also has: 600G channelized multirate Ethernet subsystem (DCMAC), RS-FEC, and 400G High-Speed Crypto (HSC) Engines, saving more than 2.3M system logic cells. For a chip-to-chip interface, Versal Premium devices have hardened IPs for PCIe® Gen5 and 600G Interlaken, saving an additional 820K system logic cells and along with power. Scalar Engines and the Vivado® Design Suite provide an ideal platform to build data-flow control, tracking, and reporting software.	Zynq UltraScale+ RFSoC Versal Premium series

Design Examples

Description

Device Support

Click to enlarge

Mobile Phone Tester

Mobile Phone Tester emulates a network and, as such, requires an adaptable platform with rich resources including hardened DSP blocks, and memory to implement the baseband and digital front end (DFE) functions of different cellular standards. Support for different parallel and serial I/O interfaces is also needed to interface to DAC/ADC, processors, and memory banks.
Versal Premium series offers superior performance/watts to realize high-performance mobile phone tester.
Zynq® UltraScale+™ RFSoC offers resource and power-efficient solutions for LPDC and Turbo FEC.

Zynq UltraScale+ RFSoC

Versal Premium series

Click to enlarge

Ethernet Tester: Layer 1-3

Xilinx Versal Premium series with its 112G PAM4 transceivers providing 9Tb/s of serial bandwidth enables high bandwidth to interconnect to optics, backplane, and chip-to-chip. It also has: 600G channelized multirate Ethernet subsystem (DCMAC), RS-FEC, and 400G High-Speed Crypto (HSC) Engines, saving more than 2.3M system logic cells. For a chip-to-chip interface, Versal Premium devices have hardened IPs for PCIe® Gen5 and 600G Interlaken, saving an additional 820K system logic cells and along with power. Scalar Engines and the Vivado® Design Suite provide an ideal platform to build data-flow control, tracking, and reporting software.

Zynq UltraScale+ RFSoC

Versal Premium series

Documentation