The Finite Impulse Response (FIR) Filter is one of the most ubiquitous and fundamental building blocks in DSP systems. Although its algorithm is extremely simple, the variants on the implementation specifics can be immense and a large time sink for hardware engineers today, especially in filter-dominated systems like Digital Radios.The FIR Compiler reduces filter implementation time to the push of a button, while also providing users with the ability to make trade-offs between differing hardware architectures of their FIR Filter specification.
Before configuring the FIR Compiler, use a Filter Design tool, such as MATLAB®, to generate coefficients for the application.
Once you have the coefficients, configure the IP customization options. For details, the Customizing and Generating the Core section in the Design Flow Steps chapter of the FIR Compiler Product Guide (PG149).
Start by configuring the following options:
In addition, review the following tabs on the left side of the GUI:
After the IP has been configured, generate the IP solution.
The FIR Compiler generates an example test bench along with the IP. Information on the test bench can be found in the Test Bench chapter of the FIR Compiler Product Guide (PG149). The best way to test a FIR Compiler implementation is to implement an impulse and review the impulse response in simulation. Many simulation tools allow formatting of the output in an analog format, which will give a visual view of the impulse response that can be reviewed in addition to the data response.
Now you are ready to integrate the FIR Compiler into your own application. The user interface is described in the Port Description section in the Product Specification chapter of the FIR Compiler Product Guide (PG149). Review the simulation in Step 3 as a reference on the expected waveforms for the interface ports.