The Xilinx LogiCORE™ Binary Counter IP core provides LUT and single DSP48 slice implementations. The Binary Counter is used to created up counters, down counters, and up/down counters with outputs of up to 256-bits wide. Support is provided for one threshold signal that can be programmed to become active when the counter reaches a user defined count. The upper limit of the count is user programmable and the counter’s increment value can be user defined. When the counter reaches terminal count or the count to value, the next count is zero.